Timer Using ARM7


LPC2148 comes loaded with two 32-bit-Timer blocks. Each Timer block can be used as a Timer (like for e.g. triggering an interrupt every t- microsecond) or as a Counter and can be also used to demodulate PWM signals given as input.

  • A timer has a Timer Counter(TC) and Prescale Register associated with it.
  • The timer is Reset and Enabled TC is set to 0 and incremented by 1 every PR+1 clock cycles.
  • When it reaches to the maximum value it gets reset to 0 and hence restarts counting.


  • Prescale Register is used to define the solution of the timer.
  • If PR=0 then TC is incremented every 1 clock cycle of the peripheral clock.
  • If PR=1 then TC is incremented every 2 clock cycles of peripheral clock and so on.
  • PR: Prescale Register
    Stores the maximum value of Prescale counter after which it is reset.
  • PC: Prescale Counter Register:
    This register increments on every PCLK(Peripheral clock). This register controls the resolution of the timer. When PC reaches the value in PR, PC is reset back to 0 and Timer Counter is incremented by 1. Hence if PR=0 then Timer Counter Increments on every 1 PCLK.
  • TC : Timer Counter Register
    Timer Counter increments when the PC reaches its maximum value as specified by PR. If the timer is not reset explicitly(directly) or by using an interrupt then it will act as a free-running counter which resets back to zero when it reaches its maximum value which is 0xFFFFFFFF.
  • TCR: Timer Control Register
    This register is used to enable, disable and reset TC. When bit0 is 1 timer is enabled and when 0 it is disabled. When bit1 is set to 1 TC and PC are set to zero together in sync on the next positive edge of PCLK.
  • CTCR : Count Control register
    Used to select Timer/Counter Mode. For our purpose, we going use this in Timer Mode. When the value of the CTCR is set to 0X0 Timer Mode is selected.
  • MCR: Match Control register
    This register is used to control all operations can be done when the value in MR matches the value in TC. Bits 0,1,2 are for MR0, Bits 3,4,5 for MR1
  • IR: Interrupt Register
    It contains the interrupt flags for 4 match and 4 capture interrupts. Bit0 to bit3 are for MR0 to MR3 interrupts respectively. And similarly, the next 4 for CR0-3 interrupts. When an interrupt is raised the corresponding bit in IR will be set to 1 and 0 otherwise. Writing a 1 to the corresponding bit location will reset the interrupt.


 #include <LPC21xx.H>
 void delay(void);
 int main()
 void delay(void)
 int i;