Pulse Width Modulation Using ARM7

Description

Pulse-width modulation (PWM) or pulse-duration modulation (PDM), is a modulation technique that conforms the width of the pulse, the pulse duration, based on modulator signal information.

  • Although this modulation technique can be used to encode information for transmission, its main use is to allow the control of the power supplied to electrical devices, especially to inertial loads such as motors.
  • The term duty cycle describes the proportion of ‘on’ time to the regular interval or ‘period’ of time.
  • Two types of PWM :
    1) Single Edge PWM: Pulse starts with new Period.
    2) Double Edge PWM: Pulse can be anywhere within the Period.
  • A PWM block, like a Timer block, has a Timer Counter and an associated Prescale Register along with Match Registers.
  • It works exactly the same way as in the case of Timers.

PWM Registers

  • PWMTCR: PWM Timer Control Register
    This register is used to control the Timer Counter inside the PWM block. Only Bits: 0, 1, 3 are used rest are reserved.
    Bit 0 : This bit is used to Enable/Disable Counting.
    When 1 = PWM Timer counter and PWM Prescale counter are enabled. When 0 = Both are disabled.
    Bit 1: This bit is used to Reset both Timer and Prescale counter inside the PWM block.
    When set to 1 it will reset both of them (at next edge of PCLK).
    Bit 3: To enable the PWM mode i.e the PWM outputs.Other Bits: Reserved.
  • PWMPR: PWM Prescale Register
    PWMPR is used to control the resolution of the PWM outputs. The Timer Counter(TC) will increment every PWMPR+1 Peripheral Clock Cycles (PCLK).
  • PWMMR0 PWMMR6 : Match Registers
    These are the seven Match registers as explained above which contain Pulse Width Values i.e the Number of PWMTC Ticks.
  • PWMMCR : PWM Match Control Registers
    The PWM Match Control Register is used to specify what operations can be done when the value in a particular Match register equals the value in TC.
  • PWMIR: PWM Interrupt Register
    If an interrupt is generated by any of the Match Register then the corresponding bit in PWMIR will be set high. Writing a 1 to the corresponding location will clear that interrupt
  • PWMLER: Latch Enable Register
    The PWM Latch Enable Register is used to control the way Match Registers are updated when PWM generation is active.
  • PWMPCR: PWM Control Register
    This register is used for Selecting between Single Edged and double Edged outputs and also to Enable/Disable the 6 PWM outputs which go to their corresponding Pins.

PWM Prescale(PWMPR) Calculations

  • The delay or time required for Y clock cycles of PCLK at X MHz is given by : Delay = YsecondsX * 106 When we take PR into consideration we get Y = PR+1. Now, consider that PCLK is running at 60Mhz then X=60. Hence if we use Y=60 i.e PR=59 then we get a delay of exact 1 microsecond(s).
  • So with PR=59 and PCLK @ 60Mhz our formpa reduces to :
  • Delay =59+1seconds = 1 micro-seconds60 * 106Similarly when we set Y=60000 i.e PR = 59999 the delay will be 1 milli-second(s) :
  • Delay =599999+1seconds = 1 milli-second60 * 106.This delay which is defined using Prescale will be the delay required for TC to increment by 1 i.e.,TC will increment every PR+1 Peripheral Clock Cycles (PCLK).

PWM Wave Form

Code

 #include<LPC21XX.h>
 void lcdcmd(unsigned char);
 void lcddata(unsigned char);
 void delay(unsigned int);
 void intr(void)__irq;
 
 int main() {
 IODIR0=IODIR0 | 0x007FB400;
 lcdcmd(0x01);
 lcdcmd(0x38);
 lcdcmd(0x0E);
 lcdcmd(0x06);
 lcdcmd(0x80);
 lcdcmd(0x01);
 lcddata('H');
 lcddata('A');
 lcddata('I');
 PINSEL0|=0X00008000;
 PWMTC=0X00000000;
 PWMPR=0X00000001;
 PWMPC=0X00000000;
 PWMMR0=0X00009c40;
 PWMMR1=0X000007d0;
 PWMMR2=0X00000030;
 PWMMCR=0X00000002;
 PWMPCR=0X00000604;
 PWMLER=0X07;
 PWMTCR=0X09;//ENBLE TIMER AND PWM
 lcdcmd(0X01);
 lcddata('O');
 lcddata('N');
 while(1);
 }
 
 void lcdcmd(unsigned char a)
 {
 IO0CLR=IO0CLR | (1<<12); //making rw=0
 IO0CLR=IO0CLR | (1<<13);//making rs=0 for command reg
 IO0SET=IO0SET | (a<<15); //loading cmd to DO to D7
 IO0SET=IO0SET | (1<<10);//making en=1
 delay(1000);
 IO0CLR=IO0CLR | (1<<10);//making en=0
 IO0CLR=IO0CLR | (a<<15);
 }
 
 void lcddata(unsigned char a)
 {
 IO0CLR=IO0CLR | (1<<12); //making rw=0
 IO0SET=IO0SET | (1<<13);//making rs=1 for data reg
 IO0SET=IO0SET | (a<<15);//loading data to D0 to D7
 IO0SET=IO0SET | (1<<10);//making en=1
 delay(1000);
 IO0CLR=IO0CLR | (1<<10);//making en=0
 IO0CLR=IO0CLR | (a<<15);
 }
 
 void delay(unsigned int count)
 {
 int i,j;
 for(i=0;i<count;i++)
 for(j=0;j<i;j++);
 } 

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