- There are two methods for serial data communication
- Atmega16 have serial communication peripheral systems:
- Atmega16 have independent hardware for serial USART communication.
- AVR Serial USART provides full-duplex communication between the transmitter and receiver.
- To enable the serial communication in atmega16 certain registers should be config.
- UCSR:USART control and status register.
It is divided into three parts
These registers are basically used to configure the USART.
- UBRR: USART Baud Rate Registers.
Set the baud rate of USART.
- UDR: USART data register.
UCSR: USART Control & Status Register
UCSRA:USART Control & Status Register A
- RXC: Receive Complete
RXC flag is set to 1 : Unread data exists in receive buffer
RXC flag is Set to 0 : Receive buffer is empty.
- TXC: Transmit complete
TXC flag is set to 1:When the data is completely transmitted to the Transmit shift register and no data is present in the buffer register UDR.
- UDRE: USART Data Register Empty
The flag is set to logic 1 : When the transmit buffer is empty, indicating it is ready to receive new data.
UDRE bit is cleared by writing to the UDR register.
UCSRB: USART Control and Status Register B
- RXCIE: RX Complete Interrupt Enable,
IF 1 – RXCIE is enabled.
IF 0 – RXCIE is disabled.
- TXCIE: TX Complete Interrupt Enable,
IF 1 – TXCIE is enabled
IF 0 – TXCIE is disabled.
- UDRIE: USART Data Register Empty Interrupt Enable,
IF 1 – UDRE flag interrupt is enabled.
IF 0 – UDRE flag interrupt is disabled.
- RXEN: Receiver Enabled,
IF 1 – USART RX is enabled.
IF 0 – USART RX is disabled.
- TXEN: Transmitter Enabled,
IF1 – USART TX is enabled.
IF0 – USART TX is disabled.
UCSRC: USART Control & Status Register C
- URSEL: USART Register select.
This bit must be set due to the sharing of the I/O location by UBRRH and UCSRC.
- UMSEL: USART Mode Select,
IF 1 – Synchronous Operation
IF 0 – Asynchronous Operation.
- UPM: USART Parity Mode:
Parity mode selection bits.
- USBS: USART Stop Select Bit:
IF 0 – 1 Stop Bit
IF 1 – 2 Stop Bits.
- UCSZ: The UCSZ bits combined with the UCSZ2 bit in UCSRB set the size of the data frame.
UBRR (USART Baud Rate Registers)
- UBRR is divide into to UBRRH and UBRRL
The UBRRH register shares the same I/O address with the UCSRC register.
The differentiation is done on the basis of the value of URSEL bit.
- IF URSEL=0: write operation is done on the UBRRH register.
- IF URSEL=1: write operation is done on the UCSRC register.
- The UBRRH and UBRRL register can store the 12-bit value of the baud rate.
- UBRRH contains the 4 most significant bits and UBRRL contains the other 8 least significant bits.
- UBRR register value is calculated by the following formpa:
UBRR=((system clock frequency)/(16*BaudRate))-1.
- The USART Data receive and data transmit buffer registers share the same address as USART UDR register.
- If the data is written to the register it is written in transmit data buffer register (TXB).
- The Received data is read from the Receive data buffer register (RXB).